Integration of OTS based back-end selector with HfO2 OxRAM for crossbar arrays

In this paper, we propose the integration of a Ge-Sb-Se-N (GSSN) back-end selector with a HfO₂/Ti resistive memory (RRAM) in 1S1R configuration. GSSN composition was tuned in order to be optimized for RRAM characteristics, combining low leakage current without degrading operating voltages. Electrical characterization of 1S1R structure was achieved to quantify and extract device features. More than 2 decades were measured between ON and OFF states. Leakage current lower than 1nA was achieved on unselected devices (V_read/3). Modeling was performed in order to understand RRAM and OTS contributions in 1S1R conduction and to identify the best reading strategy. Based on 1S1R electrical performances, crossbar array was investigated predicting >1Mb size for the elementary array tile down to 10nm node.

I. Introduction

Resistive Random Access Memories (RRAM) are one of the most promising candidates to replace flash memories in Storage Class Memory (SCM) applications. Their good scalability and their easiness of integration in the Back End of Line (BEOL) allow them to be used in 3D architectures and crossbar arrays, to target high memory density [1]. Intrinsic sneak path remains one of the big issues of such configurations, making essential the use of robust selector devices (1S) connected in series with the memory device (1S1R). Several selector technologies are proposed in literature. Among them, Ovonic Threshold Switching (OTS) selector devices are interesting candidates due to their high ON/OFF current ratio, high ON current, high endurance and high non linearity [2]. OTS selectors are fabricated using amorphous chalcogenide materials, which present a high resistivity, essential to reduce the leakage current in the memory arrays. Their selectivity is based on two levels of conductivity: a low-conductive state (OFF-state) and a metastable conductive state (ON-state) that enables the programming of the memory. GeSe selector with OxRAM device was integrated in [3]. This work, presents the co-integration of Ge-Se-Sb-N OTS selector with HfO₂ RRAM in order to significantly enlarge the window margin, improve the insulating capabilities of the 1S1R structure and reduce sneak paths in crossbar arrays, without degrading operating voltages.