Gate Stability and Robustness of In-Situ Oxide GaN Interlayer Based Vertical Trench MOSFETs (OG-FETs)

Vertical GaN devices are currently studied for application in next-generation power converters, but very little is known about their reliability. This work presents the first analysis on the stability of In-Situ Oxide GaN Interlayer based Vertical Trench MOSFET (OG-FET) submitted to forward gate bias. Based on pulsed measurements, step stress tests and threshold voltage transients we demonstrate the following original results: (i) under forward gate bias, the devices show a good stability up to 6-7 V; (ii) higher stress voltages induce a positive shift of threshold voltage (V_TH), which has a logarithmic time-dependence and is ascribed to the injection of electrons in the oxide. (iii) The trapping mechanisms are recoverable; the related kinetics were investigated by means of threshold voltage transients at different temperatures.

I. Introduction

GaN lateral high electron mobility transistors (HEMTs) have demonstrated excellent performance for medium power applications (650 V) [1]. However, for high power applications, vertical GaN devices are preferred, since in lateral transistors the breakdown voltage is limited by the gate-drain length, and the peak of the electric field close to the surface. Several different GaN vertical transistors have been reported in literature (CAVET, trench MOSFET, Vertical fin FET, vertically aligned GaN nanowires) [2]–[5]. For the normally-OFF In-Situ Oxide GaN interlayer-based vertical trench MOSFET (OG-FET) excellent DC performance was demonstrated while switching performance looked very promising [6] [7]. Despite the potential of this new technology, very little is known about its stability.