I. Introduction
With continuously rising transfer speeds, chip-to-chip and on-chip electrical interconnects will continue to experience data-rate bottlenecks resulting from their bandwidth-limited I/O. Short-reach optical interconnects using silicon photonics (SiP) have been demonstrated as a solution for bandwidth limitations in both chip-to-chip [1] and on-chip links [2]. These optical interconnects do not suffer from the same limitations as electrical ones, namely, frequency-dependent loss and electromagnetic interference. While SiP fabrication techniques are continuously improving, they can still be considered in their infancy compared to the more mature CMOS processes. The SiP structures can be impacted by fabrication variation causing optical loss [3], [4], parasitic coupling [5], or require postfabrication tuning [6].