Abstract:
This paper presents a DC-60 GHz I/Q modulator/transmitter chip in 45 nm SOI CMOS, that can serve as a critical building block for next generation multi-standard and high-...Show MoreMetadata
Abstract:
This paper presents a DC-60 GHz I/Q modulator/transmitter chip in 45 nm SOI CMOS, that can serve as a critical building block for next generation multi-standard and high-capacity wireless backhaul links. The modulator consists of a wideband quadrature signal generator, wideband buffers and two current-combined DC-100 GHz low-noise double-balanced mixers driven in quadrature. The 1.4mm2 modulator chip achieves 60 dB of dynamic range in a 1 GHz bandwidth, with an OP1dB of -10 to -12 dBm, thus enabling spectrally-efficient high-order modulation schemes such as 256-QAM. The I/Q modulator achieves 200 Gbps in 16-QAM (50 Gbaud/s), while consuming 200 mW, resulting in record 1 pJ/bit modulation efficiency. In addition to backhaul links, the modulator is an attractive and cost-effective alternative to short-range optical links for data center interconnects (DCI) applications.
Published in: 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)
Date of Conference: 15-17 October 2018
Date Added to IEEE Xplore: 29 November 2018
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