Performance of three phase 11-level inverter with reduced number of switches using different PWM techniques

As compared to conventional inverter topologies like diode clamped and capacitor clamped inverters, the cascaded multilevel inverter has lesser harmonics as well as lower switching stress. The cascaded topology has more number of power switches leading to greater heat losses, larger size, higher cost and more gate drive circuitry. The proposed configuration contains less number of switches and produces lesser harmonics in the output voltage than the cascaded topology. A comparison between four different types of pulse width modulation (PWM) techniques, namely, In-phase disposition (IPD), Anti-phase disposition (APD), Carrier Overlap (CO) and Variable Frequency (VF) PWM methods, has been done. The results have been verified through simulation study in MATLAB/Simulink in order to select the best PWM method that provides minimum THD in the output voltage. An LC filter has been designed to improve the harmonic profile.

I. Introduction

Power electronic devices play a major role in the conversion and control of electric power, especially to extract power from renewable energy sources like photovoltaic array and wind energy [1]. Conversion of DC to AC power can be done with the help of inverters (single phase or three phases). Conventional bipolar inverters produce alternating staircase waveforms with higher harmonics. Thus, the multilevel inverters (MLI) were developed [2]. This paper provides a new three phase configuration to produce the l 1-level output with less total harmonic distortion (THD) in its output voltage. IPD, APD, CO and VF PWM techniques were used to produce switching pulses[3].