Abstract:
This paper describes implementation issues for high speed 2-step-flash analog-to-digital converters (ADCs) without digital correction. A novel implementation for a multip...Show MoreMetadata
Abstract:
This paper describes implementation issues for high speed 2-step-flash analog-to-digital converters (ADCs) without digital correction. A novel implementation for a multiplying digital-to-analog converter (MDAC) is described, which is a sample-and-hold amplifier, which includes a DAC, residue amplification and correlated double sampling (CDS), thereby omitting two-phase compensation differences. No digital correction is needed because linearity of the 2-step-flash ADC is provided by a capacitor-array matching and CDS prevents missing codes due to offset in the MDAC.
Date of Conference: 20-23 May 2012
Date Added to IEEE Xplore: 20 August 2012
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Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
Contents Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
Institute of Microelectronics, University of Ulm (EBS), Ulm, Germany
