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Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture | IEEE Conference Publication | IEEE Xplore

Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture


Abstract:

In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The...Show More

Abstract:

In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The proposed architecture is based on CMOS-nano hybrid techniques that incorporate nanomaterials such as carbon nanotube bundles and nanowire crossbars into CMOS fabrication process. Using unique features of FPGAs and a novel 3D stacking method enabled by the application of nanomaterials, 3D nFPGA obtains a 4.5X footprint reduction compared to traditional CMOS-based 2D FPGAs. With a customized design automation flow, we evaluate the performance and power of 3D nFPGA driven by the 20 largest MCNC benchmarks. Results demonstrate that 3D nFPGA is able to provide a performance gain of 2.6X with a small power overhead comparing to the CMOS 2D FPGA architecture.
Date of Conference: 04-08 November 2007
Date Added to IEEE Xplore: 10 December 2007
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Conference Location: San Jose, CA
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