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A Nonvolatile, Low-Power, and Highly Reliable MRAM Block for Advanced Microarchitectures | IEEE Journals & Magazine | IEEE Xplore

A Nonvolatile, Low-Power, and Highly Reliable MRAM Block for Advanced Microarchitectures


Abstract:

Following the scale down of complementary metal-oxide semiconductor (CMOS) technology, radiation-induced soft errors have become a concerning issue in CMOS circuit design...Show More

Abstract:

Following the scale down of complementary metal-oxide semiconductor (CMOS) technology, radiation-induced soft errors have become a concerning issue in CMOS circuit design. Today's integrated circuits suffer from single event double node upset (SEDU) that takes place when an energetic particle strike affects two adjacent nodes. In this letter, a magnetic random access memory block capable of tolerating SEDUs is proposed and evaluated. The proposed circuit utilizes a hybrid design of magnetic and CMOS-based technology that considerably reduces the static power, improves the performance, and offers the advantage of nonvolatility. Simulation results validated that the proposed circuit is fully single event upset and also SEDU immune beside the other advantages offered.
Published in: IEEE Transactions on Device and Materials Reliability ( Volume: 17, Issue: 2, June 2017)
Page(s): 472 - 474
Date of Publication: 13 April 2017

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