Design and Implementation of Image Signal Processor Based on CUDA

With the rapid development of image signal processor (ISP), the implementation of ISP based on CPU or FPGA has become a major focus of current research. However, the implementation of CPU-based ISP has a long runtime and the implementation of FPGA-based ISP is inflexible, difficult to program and debug, and unable to display image in real time. To solve these problems, this paper designs and implements an ISP based on CUDA with the advantages of short runtime, easy debugging, and real-time image display. The designed ISP includes pipeline design, vivid color manipulation, CPU and GPU co-processing, and the selection of output and display image at any stage. The experimental results show that for images with resolution of 2000 x 3008, the speedup ratio can reach 63 without considering the data transfer time and more than 53 with considering the data transfer time.