Loading [MathJax]/extensions/MathMenu.js
A new phase-locked loop (PLL) system | IEEE Conference Publication | IEEE Xplore

A new phase-locked loop (PLL) system


Abstract:

An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over...Show More

Abstract:

An enhanced phase-locked loop (PLL) system is presented and its properties and performance characteristics are investigated. Advantages of the proposed PLL structure over the conventional PLLs including its capability of direct estimation of amplitude and phase angle of its input signal, within a wide range of parameters, are demonstrated. Main features of the proposed PLL are structural simplicity and performance robustness. Performance of the PLL, based on both analog and digital realization, is also presented.
Date of Conference: 14-17 August 2001
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-7150-X
Conference Location: Dayton, OH, USA

Contact IEEE to Subscribe

References

References is not available for this document.