Design of Three-Valued Logic D-Latch Using GNRFET

MVL is the promising alternative to the binary logic. GNRFET is more suitable for Multi-Valued Logic Circuits because it reduces power leakage, energy consumption. MVL logic provides less complexity, high speed circuit, small chip area in digital circuits. The GNRFETs are considered to regulate the Vth. Threshold voltage Vth control in GNRFET is possible by varying the width and no. of Dimer lines (N). In Ternary logic family there are 3 types of inverters Standard Ternary Inverter, Negative Ternary Inverter, Positive Ternary Inverter. To design ternary D-Latch NTI, STI, NAND gates are used. A latch is an electronic device, which changes its output based on the applied input. Latches are the smallest building blocks of memory. In the VLSI technology area, power consumption of the circuit is very important. In this paper, the performance of Three-Valued Logic D-Latch using GNRFET in terms of power, delay are calculated. The simulation of GNRFET based three valued logic D-Latch is done using HSPICE 32nm technology tool. It is observed that power is 20.60uW and delay is 150.04 ns.

I. Introduction

The three valued logic is the promising alternative to the ternary logic family. Generally a binary logic has two logic states one is logic 0 and the other is logic 1 i.e, low and high. Whereas in ternary there are 3 logic states they are logic 0, logic 1 and logic 2 that means low level, middle level and high level [1]. The advantages of TL are less chip area, high speed, less delay and low power consumption. It is power efficient, low complex and high speed circuits. It requires fewer gates to design the circuit. Depending on the MOSFET technology the TLC are classified as current mode and voltage mode. Variation of threshold voltage in CMOS technology results in high leakage current, high power density & SCE (short channel effects). So, to overcome these problems, carbon nanotechnology is introduced, CNT field effect transistors, GNR Field Effect Transistors are nanometer devices. A Ternary inverter is classified into 3 categories: Negative, Positive and Standard Ternary Inverter. Ternary NAND and Ternary NOR Gates are designed using STI, NTI and PTI inverters. Ternary inverter consists of single input & three outputs.