I. Introduction
Nowadays, due to increase in the usage of portable consumer electronics, low power designs become crucial. The market demand for chip design concentrates mainly on (i) Low power (ii) High speed (iii) Less area on-chip. Intensified research proves that memristors are one of the promising alternate solutions for nearing obsolesce of CMOS technology [1]. The binary comparator plays a major role in multiprocessing and parallel computing. In traditional CMOS method, the logic function is implemented using both PMOS and NMOS transistors, but the application of large number of inputs results in circuit complexity and degraded operating speed. Even though, the CMOS technology leads to the innovation of several logic design styles like Pass Transistor Logic (PTL), Pseudo NMOS logic style and Transmission Gates, the use of MOSFET is nearing its obsolence. A memristor is a nonvolatile, 2-terminal nano sized alternative device for MOSFET with unique characteristics of computing and storing simultaneously for unconventional computational framework. The logic styles based on memristors like IMPLY logic, RTL [2] and MRL etc., is explored for the implementation of digital logic circuits. The proposed 2-bit comparator is designed based on hybrid CMOS-memristive logic based on MRL. The idea of hybrid CMOS-memristive logic based on Memristor Ratioed Logic (MRL) [3] implements AND and OR gates with only memristors, but NOT gate requires CMOS inverter. In MRL, the logic value is represented as voltage, whereas memristance is represented as logic value in IMPLY logic.