Abstract:
This paper presents the design and implementation of speed control for a brushless direct current (BLDC) motor using a complex programmable logic device (CPLD). Implement...Show MoreMetadata
Abstract:
This paper presents the design and implementation of speed control for a brushless direct current (BLDC) motor using a complex programmable logic device (CPLD). Implementation of speed control is using a PWM technique by varying duty cycles applied to a three-phase inverter. Rotor position determines by hall sensors which are used as references to synchronize the PWM control signals. The control model is written using Verilog Hardware Description Language (HDL) and verified by simulation using ModelSim-Altera. An experimental setup is built to test the performance of the BLDC Motor under the PWM control. The control algorithm is implemented using Max II EPM240T100C5 devices on a 350W 36V rated BLDC motor. The number of the used logic elements (LEs) of the CPLD is about 150 of 240 LEs. PWM with controllable duty cycle generated in this system for having working frequency about 20KHz and commutate sequentially according to six-step commutation up to 2300 RPM.
Published in: 2021 International Conference on Smart-Green Technology in Electrical and Information Systems (ICSGTEIS)
Date of Conference: 28-30 October 2021
Date Added to IEEE Xplore: 24 December 2021
ISBN Information: