Design and Analysis of First Order Sigma-Delta Modulator Based on Switched Capacitor Integrator (130nm)

The modern world is digitally advancing rapidly. However, the real world is analog which requires an adequate converter. The analysis of Such an Analog-to-digital modulator is designed and presented in this paper. The ΣΔ-modulator inherits an OTAas the main block. Where the modulator is a discrete-time switched capacitor integrator, Discrete-time low pass integrator and a double tail comparator as 1-bit ADC/quantizer obtain a first-order noise shaping modulator. The modulator implemented at 0.13um CMOS technology using 1.3v supply voltage. That obtained the SFDR of 72.58dB, THD of 0.489 and overall power dissipation (excluding D-flip flips) of the modulator is 1.147mw.