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Investigation on a Desirable DPD Architecture and Trapping Characteristics for GaN Power Amplifier Linearization | IEEE Conference Publication | IEEE Xplore

Investigation on a Desirable DPD Architecture and Trapping Characteristics for GaN Power Amplifier Linearization


Abstract:

A 2-level digital predistortion (DPD), a simplified version of a piecewise DPD, is designed and used to verify that a piecewise DPD is effective in linearizing typical Ga...Show More

Abstract:

A 2-level digital predistortion (DPD), a simplified version of a piecewise DPD, is designed and used to verify that a piecewise DPD is effective in linearizing typical GaN devices in industry that exhibit low power distortions due to trapping. A further investigation is taken to understand the device characteristics that are favored by a piecewise DPD by characterizing various devices.
Date of Conference: 07-25 June 2021
Date Added to IEEE Xplore: 27 October 2021
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Conference Location: Atlanta, GA, USA

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