Abstract:
VirtIO is a specification that enables developers to base on a common interface to implement devices and drivers for virtual environments. This paper proposes the verific...Show MoreMetadata
Abstract:
VirtIO is a specification that enables developers to base on a common interface to implement devices and drivers for virtual environments. This paper proposes the verification and analysis of the VirtIO specification by using the Clock Constraint Specification Language (CCSL) [1]. In our proof-of-concept approach, a verification engineer translates requirements into a CCSL specification. Then, the tool TimeSquare [2] is used to detect inconsistencies with a implementation but also to understand what the specification enables. This paper aims to present the approach and to have face-to-face discussions and debate about the benefits, drawbacks and trade-offs.
Date of Conference: 01-05 February 2021
Date Added to IEEE Xplore: 16 July 2021
ISBN Information: