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Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture | IEEE Conference Publication | IEEE Xplore

Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural Network Architecture


Abstract:

Emerging memristor-based computing has the potential to achieve higher computational efficiency over conventional architectures. Bit-slicing scheme, which represents a si...Show More

Abstract:

Emerging memristor-based computing has the potential to achieve higher computational efficiency over conventional architectures. Bit-slicing scheme, which represents a single neural weight using multiple memristive devices, is usually introduced in memristor-based neural networks to meet high bit-precision demands. However, the accuracy of such networks can be significantly degraded due to non-zero minimum conductance (Gmin) of memristive devices. This paper proposes an unbalanced bit-slicing scheme; it uses smaller slice sizes for more important bits to provide higher sensing margin and reduces the impact of non-zero (Gmin).Moreover, the unbalanced bit-slicing is assisted by 2's complement arithmetic which further improves the accuracy. Simulation results show that our proposed scheme can achieve up to 8.8× and 1.8× accuracy compared to state-of-the-art for single-bit and two-bit configurations respectively, at reasonable energy overheads.
Date of Conference: 06-09 June 2021
Date Added to IEEE Xplore: 23 June 2021
ISBN Information:
Conference Location: Washington DC, DC, USA

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