On-state resistance degradation of power RF N-LDMOS devices due to defects created at interface

The papier study the temperature effects on I-V characteristics of N-channel power RF LDMOS devices, and especially of R_DS-on resistance; which is a main constraint of LDMOS devices in high temperature operations, that can partially or total change the performances of physical and electrical device. R_DS-on has strong temperature dependence. The main parameters electrical relevant to the temperature effects of the device behavior is reported and proven by the basic physical behavior. The analysis of the experimental results is presented and the physical simulations (2D ATLAS-SILVACO) are used to explain and observe the preview of temperature impacts on power RF LDMOS performance. The physical parameters like current lines, concentration, electric field and mobility are taken into consideration follows temperature dependence. Finally, initial impacts analysis is discussed.

I. Introduction

Metal Oxide Field Effect Transistors (MOSFETs) are the most widely used active devices in high power RF field. They offer several advantages over bipolar power devices, such as in particular; better linearity, with intermodulation products of smaller amplitude, and these are devices that are better from thermal runaway [1]–[2]. The cost of MOSFETs represents a clear advantage over III- V technologies for application rates up to around 4 GHz. Recently, the characterization, optimization, and reliability of LDMOS devices have drawn much attention [3]–[5]. For this purpose, we designed and implemented an innovative reliability bench able to keep track of all RF powers, voltages and device base-plate temperatures whose values correspond to stress operating conditions [6], [7].