Effect Of Dielectric Pocket on TFET at Source/Channel Junction in Buried SiGe Strained Source

This simulation study aims to observe the effects of a dielectric pocket at in a buried SiGe strained source. Different dielectric combinations were used and corresponding device performance were observed using Silvaco TCAD simulator. It was noted that low-k dielectric in Dielectric Pocket offers improved On current and Subthreshold Slope while showing reduced ambipolarity. Further, SiO2 as dielctric material inside the channel offers superior performance when compared to other cases that were takeninto account in this study.