Constructive Estimates of the Pull-In Range for Synchronization Circuit Described by Integro-Differential Equations

The pull-in range, known also as the acquisition or capture range, is an important characteristics of synchronization circuits such as e.g. phase-, frequency- and delay-locked loops (PLL/FLL/DLL). For PLLs, the pull-in range characterizes the maximal frequency detuning under which the system provides phase locking (mathematically, every solution of the system converges to one of the equilibria). The presence of periodic nonlinearities (characteristics of phase detectors) and infinite sequences of equilibria makes rigorous analysis of PLLs very difficult in spite of their seeming simplicity. The models of PLLs can be featured by multi-stability, hidden attractors and even chaotic trajectories. For this reason, the pull-in range is typically estimated numerically by e.g. using harmonic balance or Galerkin approximations. Analytic results presented in the literature are not numerous and primarily deal with ordinary differential equations. In this paper, we propose an analytic method for pull-in range estimation, applicable to synchronization systems with infinite-dimensional linear part, in particular, for PLLs with delays. The results are illustrated by analysis of a PLL described by second-order delay equations.