Abstract:
Non-Volatile Memory technologies are rising as a candidate for a universal memory. NVMs offer solutions for the high power consumption that contemporary memory suffers fr...Show MoreMetadata
Abstract:
Non-Volatile Memory technologies are rising as a candidate for a universal memory. NVMs offer solutions for the high power consumption that contemporary memory suffers from. Hence, we propose augmenting the traditional SRAM cache with an additional NVM device instead of entirely replacing SRAM with NVM. The L1 instruction-cache is augmented with a Non-Volatile Scratch-Pad, coined NV-SP, that stores instructions causing the highest number of misses. Experiments were evaluated for performance and energy of the SRAM I-cache and the NV-SP when implemented using Magnetic RAM and Phase-Changing RAM technologies. Results have shown that MRAM NV-SP had effectively improved the performance of the I-cache.
Date of Conference: 06-08 July 2020
Date Added to IEEE Xplore: 04 August 2020
ISBN Information:
ISSN Information:
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- IEEE Keywords
- Index Terms
- Scratch Pad ,
- Non-volatile Memory ,
- Number Of Misses ,
- Memory Technologies ,
- Total Energy ,
- Increased Energy ,
- Energy System ,
- Energy Calculations ,
- Performance Degradation ,
- Types Of Applications ,
- Evaluation Framework ,
- Energy Rate ,
- Memory System ,
- Missing Rate ,
- Instruction Set Architecture ,
- Low Energy Cost ,
- Read Operation ,
- Spin Transfer Torque ,
- Total Latency ,
- Energy Leakage ,
- Access Latency ,
- L2 Cache ,
- Memory Hierarchy
- Author Keywords
Keywords assist with retrieval of results and provide a means to discovering other relevant content. Learn more.
- IEEE Keywords
- Index Terms
- Scratch Pad ,
- Non-volatile Memory ,
- Number Of Misses ,
- Memory Technologies ,
- Total Energy ,
- Increased Energy ,
- Energy System ,
- Energy Calculations ,
- Performance Degradation ,
- Types Of Applications ,
- Evaluation Framework ,
- Energy Rate ,
- Memory System ,
- Missing Rate ,
- Instruction Set Architecture ,
- Low Energy Cost ,
- Read Operation ,
- Spin Transfer Torque ,
- Total Latency ,
- Energy Leakage ,
- Access Latency ,
- L2 Cache ,
- Memory Hierarchy
- Author Keywords