Layout Optimization Design of Power IoT Chips

In 2019, the State Grid Corporation of China proposed that the important material basis for building a worldclass energy Internet enterprise is to build and operate "two networks" (ie, "Ubiquitous Power Internet of Things" and "Strong Smart Grid"). The construction of "two networks" requires the support of a large number of terminal devices, and all devices need to complete the functions of automatic data collection and calculation. The implementation of these functions is inseparable from the support of the chip. The layout design of integrated circuits is one of the key steps in chip design. A good layout design can effectively optimize the chip area, reduce the cost of the chip, and help improve the chip performance. This article will use our company’s finished chip layout design examples to explain how to achieve high security, low power consumption, high integration and low cost of power security chip from the levels of chip module layout and chip overall layout.