Analysis of Random Number Generators Based on Fibonacci-Galois Ring Oscillators

This paper presents the analysis of random number generators(RNGs) based on regular sampling of irregular waveform method where the irregular signal is obtained from the oscillations of combined Fibonacci and Galois ring oscillators. As the proposed random number generator is made up of logic gates only, it is implemented on a FPGA (field-programmable gate array). The regular waveform generated by the digital clock manager of the FPGA is used for sampling the irregular signal and the resulting bit stream is uploaded to a computer where it is subjected to standard statistical test. The polynomials defining the Fibonacci and Galois ring oscillators are varied to assess the relationship between the polynomial and the randomness of the output bit stream. It is demonstrated that for both polynomial functions, by combining enough number of oscillator structures, the output bit streams from each RNG satisfy standard statistical tests without post processing. To the best of our knowledge, this paper presents the first comparative study on the impact of polynomials on random number generators based on Fibonacci and Galois ring oscillators.

I. Introduction

As the number of devices connected to the internet is on the rise, information security becomes more challenging and crucial than ever before. Therefore, cryptograhic systems are employed to protect the confidentiality, the integrity and the authenticity of information. A key component of any cryptographic system is the random number generator (RNG) which generates unpredictable keys for ciphering algorithms, challenges, nonces, padding bytes and blinding values [1]. Commonly used methods for making RNGs are amplification of white noise source such as thermal and shot noise [2], using jittered oscillators [3], discrete-time chaotic maps [4] and continuous-time chaotic oscillators [5] [6]. Among these techniques, continuous-time chaotic oscillators can provide high throughput without post-processing and with less complex integrated circuits [7]–[8].