Delay and Power Analysis of Current and Voltage Sense Amplifiers for SRAM at 180nm Technology

In CMOS memories sense amplifier plays a very vital role. It is mostly used in a cache memory to speed up the memory read operation. The performance of sense amplifier mainly affects both memory access time and overall memory power consumption. A simple analysis indicates that the speed enhancements are possible by using current mode than voltage mode signal transporting technique. The significance of this approach is to use low resistance current signal circuits to lower the impedance level and voltage swing on long interconnect wire. Simulation results are given regarding the delay for different power supply voltages Vdd and for different values of bit line capacitances. Simulation results of static power and total power consumption for different values of Vdd are analyzed.