Design and Optimization of Ultrahigh Voltage CSL p-channel 4H-SiC IGBT

A ultrahigh voltage p-channel 4H-SiC (Silicon Carbide) IGBT (Insulated Gate Bipolar Transistor) with CSL (Current Spreading Layer) structure is designed and optimized. The static and dynamic characteristics of the IGBT is improved by adjusting the CSL doping concentration N_CSL, the CSL thickness D_CSL and the width of JFET region L_JFET. Through numerical simulations, when N_CSL is 1×10¹⁶cm^-3, D_CSL is 1.5μm and L_JFET is 3μm, the blocking voltage can reach 15.6kV, and the maximum of gate oxide field E_{OX, max} is less than 3MV/cm. When the on-state current is 10A, the on-state voltage is only 8.2V. The turn-on time is about 120ns and the turn-off time is about 440ns at 5kV dc-link voltage.