Generalized Bell-Shaped Membership Function Generation Circuit for Memristive Neural Networks | IEEE Conference Publication | IEEE Xplore

Generalized Bell-Shaped Membership Function Generation Circuit for Memristive Neural Networks


Abstract:

A generalized bell-shaped function is an essential building block for a neuro-fuzzy systems and radial basis function neural networks. With the advent of edge computing, ...Show More

Abstract:

A generalized bell-shaped function is an essential building block for a neuro-fuzzy systems and radial basis function neural networks. With the advent of edge computing, analog neuro-chips can potentially speed-up the near sensor computing. In this paper, we present a generalized bell function generator circuit for machine learning architectures. The circuit design of generalized bell-shaped function as the hybrid CMOS-Memristor that is compatible with typical memristive crossbar architecture is presented, where it uses three memristors to control the output current shape. Designed circuit occupies 10 μm2 and consumes less than 4.1 μW. The proposed circuit could be used as a standalone neuron for radial basis function neural network, as demonstrated in this work.
Date of Conference: 26-29 May 2019
Date Added to IEEE Xplore: 01 May 2019
Print ISBN:978-1-7281-0397-6
Print ISSN: 2158-1525
Conference Location: Sapporo, Japan
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I. Introduction

Near-edge computing systems can accelerate the real-time data processing from sensors in analog domains. Near-edge computing is emerging paradigm that can be used to address the problem of exponentially growing demand for sensory data processing. Neuromorphic systems is excellent candidate for edge computing for processing data in fast and efficient manner, due to high operational similarity with biological neural systems. Neuro-fuzzy systems (NFS), relaxed rule-based implementation of human-like soft decision making, find many applications in data driven control systems and some in pattern classification [1], [2]. This low popularity of NFS in the field of large scaled data driven pattern recognition is attributed to the exponential system complexity growth related to the growth of input data size [3]. The scalable and efficient implementation of fully operational NFS for neuromorphic applications is still an open problem. Analog computing circuits are solution for this issue [4].

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