Abstract:
This paper presents a low-voltage low-power four-quadrant analog multiplier using subthreshold MOS devices. The proposed design requires six transistors and two current s...Show MoreMetadata
Abstract:
This paper presents a low-voltage low-power four-quadrant analog multiplier using subthreshold MOS devices. The proposed design requires six transistors and two current sources in order to form a cross-coupling connection of four body-driven exponential cells. Circuit simulation using 0.35-μm CMOS process parameters in Cadence environment shows that the proposed circuit consumes 480 nW static power from a supply voltage of 0.8 V. It outperforms the previously reported circuits in terms of circuit complexity and power consumption.
Date of Conference: 26-30 October 2018
Date Added to IEEE Xplore: 10 January 2019
ISBN Information:
Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok, Thailand
Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok, Thailand
Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok, Thailand
Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok, Thailand