Silicide based integration approach for fabricating highly reliable, hermitically sealed on-chip, low form factor-microfluidics for 3D IC cooling applications | IEEE Conference Publication | IEEE Xplore

Silicide based integration approach for fabricating highly reliable, hermitically sealed on-chip, low form factor-microfluidics for 3D IC cooling applications


Abstract:

In this paper, we demonstrate a novel approach for fabrication of hermitically sealed, highly reliable on-chip microfluidic channel by utilizing Titanium silicide as a bo...Show More

Abstract:

In this paper, we demonstrate a novel approach for fabrication of hermitically sealed, highly reliable on-chip microfluidic channel by utilizing Titanium silicide as a bonding interface between glass and silicon. Microfluidic channel etched on silicon was bonded to Titanium coated glass wafer by forming Titanium Silicide interface. This interface is formed using thermocompression bonding carried at an optimized temperature of 380 °C and pressure of 0.2 MPa. Bond strength, scanning acoustic microscopy (SAM cross sectional scanning electron microscopy (XSEM) and dicing analyses carried out on the bonded samples indicate a highly reliable bonding interface. This CMOS compatible vertical integration process can be potentially utilized for heterogeneous integration primarily targeted towards on-chip cooling for three dimensional integrated circuits (3D-IC's) and low form factor Lab-on-Chip microfluidic platforms.
Date of Conference: 19-21 November 2018
Date Added to IEEE Xplore: 06 January 2019
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Conference Location: Kyoto, Japan

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