Hybrid Memory Cube in Embedded Systems

This paper presents an evaluation of the Hybrid Memory Cube (HMC) usage in the Embedded Systems (ES) context. HMC can provide less use of energy and physical area - primary design goals for ES - and despite satisfying tight performance requirements. Our experiments' settings have used modest configurations of L1 and L2 caches in conjunction with the main memory of LPDDR3 or HMC types. gem5 was used to simulate four MiBench applications in a 4-CPU architecture. Estimations about time, energy, and area were made using CasHMC, CACTI, and a power calculator. The HMC memory allows improvements in execution time and consumed energy. In some situations, this memory type permits removing the L2 cache from the memory hierarchy. EDP (Energy Delay Product) and EDAP (Energy-Delay Area Product) metrics show that HMC provides both energy efficiency and improved density when compared to LPDDR3. In average, EDP and EDAP values for HMC settings were nearly 85% and 92% lower than LPDDR3 ones, respectively.