TUTORIAL 01: Advanced Silicon Devices for VLSI Circuits and Systems at Nanometer Nodes

The silicon Integrated circuits (ICs) continues to have an unprecedented impact on improving almost every aspect of modern society including communications, military, security, healthcare, energy saving, industrial automation, transport, and entertainment. Over the last four decades, the relentless pursuit of IC device miniaturization for manufacturing high-performance and high-density IC-chips and system-on-a-chip (SoC) led to the creation of Internet and social media. The semiconductor components are used in smart cars, smart homes, smart cities, smart health, smart energy, smart security, smart appliances, and so on. The Internet enables connecting any and every smart devices or “things” creating “Internet of Things” (IoT) or Internet of everything (IoE). And, the IoT-connected smart devices constitute a smart environment and integrated ecosystem that can be accessed via personal computers, tablets, and smartphones from anywhere without human interaction. However, the performance of nanoscale-MOSFETs in the design and manufacturing of “smart” electronic products necessary to create smart networks or “smart things” to enable smart environments and integrated ecosystems is inadequate due to the fundamental physical limitations such as short channel effects (SCEs). Shrinking conventional bulk MOSFET device dimensions in the decananometer regime degrades device performance including degradation in the subthreshold swing and decrease in device turn-on voltage. As a result, the scaled MOSFETs cannot be turned off easily by lowering the gate voltage leading to excessive leakage current. Due to SCEs, the device characteristics become increasingly sensitive to process variation that imposes a serious challenge for continued scaling of bulk-MOSFETs for the nanometer technology nodes. In addition, at gate length below 20-nm, the sub-surface leakage paths are weakly controlled by the gate irrespective of gate oxide thickness and their potential barriers can be easily lowered by drain bias through the enhanced electric field coupling to the drain. Thus, to surmount the continuous scaling challenges of conventional bulk MOSFET devices new device technologies such as FinFET has emerged as the real alternative to MOSFETs. This tutorial provides the basic features and operating principles of FinFETs required for the understanding of design and manufacturing of advanced ICs at the nanometer nodes for smart electronic products. In addition, this tutorial also discusses the emerging undoped or lightly-doped channel MOSFETs with performance comparable to FinFETs for design and manufacturing of smart IC products.