Model and Analysis of Planar Spiral Inductor Based on Package Substrate

This paper presents the planar spiral inductor structure modeled by ANSYS HFSS. Meanwhile, footprint of spiral inductors is manufactured to validate the simulated results. Scattering parameters are utilized to extract L and Q to compare the simulation results with measured data. While changing the geometric parameters such as the metal width (w), spacing between traces (s), the number of turns (n), and inner diameter (din), varies in the performance of spiral inductors are detailedly analyzed. By using the technology of planar spiral inductors, a novel chip-package co-design method is optimized for low noise amplifier (LNA) application.