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LUPIS: Latch-up based ultra efficient processing in-memory system | IEEE Conference Publication | IEEE Xplore

LUPIS: Latch-up based ultra efficient processing in-memory system


Abstract:

Internet of Things (IoT) involves processing massive data. This poses a huge challenge in the current computing systems due to the limited memory bandwidth. Processing in...Show More

Abstract:

Internet of Things (IoT) involves processing massive data. This poses a huge challenge in the current computing systems due to the limited memory bandwidth. Processing in-memory (PIM) is a promising candidate to minimize this bottleneck and reduce the performance gap between processor and memory latency. We propose LUPIS (Latch-Up based Processing In-memory System) for nonvolatile memory (NVM). Unlike existing PIM techniques, which mainly focus on bitwise operation based computations and involve considerable latency and area penalty, our design facilitates computations like addition and multiplication with very low latency. This makes the system faster and more efficient as compared to the state-of-the-art technologies. We evaluate LUPIS at both circuit-level and application-level. Our evaluations show that LUPIS can enhance the performance and energy efficiency by 62× and 484× respectively as compared to a recent GPGPU architecture. Compared to the state-of-the-art PIM accelerator, our design presents 12.7× and 20.9× improvement in latency and energy consumption with insignificant overhead of 21% for area increase and one cycle for latency delay.
Date of Conference: 13-14 March 2018
Date Added to IEEE Xplore: 10 May 2018
ISBN Information:
Conference Location: Santa Clara, CA, USA

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