Design of low-voltage CMOS two-stage operational transconductance amplifier | IEEE Conference Publication | IEEE Xplore

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Design of low-voltage CMOS two-stage operational transconductance amplifier


Abstract:

This paper presents a low-voltage feedforward compensated two-stage operational transconductance amplifier (OTA). The OTA with feedforward compensation gives wider bandwi...Show More

Abstract:

This paper presents a low-voltage feedforward compensated two-stage operational transconductance amplifier (OTA). The OTA with feedforward compensation gives wider bandwidth as compared to Miller compensation and it is easier to stabilize. A current replicating branch with scaled-down transistors is used to implement a push-pull output stage that gives maximum output current several times higher than the bias current. The two-stage OTA with feed-forward and miller compensation is designed and simulated in a 0.18-pm CMOS process and operated at the supply voltage of 0.7 V. The feed-forward compensated amplifier achieves a DC gain of 57.4 dB and phase margin of 60.3° at the unity gain frequency of 4.5 MHz for load capacitance of 5 pF. As compared to miller compensated OTA the design based on feed-forward compensation shows 2.6 times improvement in unity-gain bandwidth and slew rate with 35% less quiescent power dissipation. For the same load capacitance of 5 pF, the compensation capacitance of miller and feed-forward compensation is 1.1 pF and 0.4 pF, respectively. The two-stage OTA based on feed-forward compensation is powerefficient and area efficient. The feed-forward design small-signal and large-signal figure-of-merits are improved 4.12 and 4 times respectively than that of conventional OTA.
Date of Conference: 15-16 December 2017
Date Added to IEEE Xplore: 08 February 2018
ISBN Information:
Conference Location: Mysuru, India

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