Abstract:
This paper describes replacement-metal-gate (RMG) fill integration solutions with a cobalt-reflow process combined with a thin barrier layer for future node FinFET and ga...Show MoreMetadata
Abstract:
This paper describes replacement-metal-gate (RMG) fill integration solutions with a cobalt-reflow process combined with a thin barrier layer for future node FinFET and gate-all-around technology. As CMOS scaling continues, the conventional tungsten CVD for RMG runs out of room to fill in a scaled gate trench. The lack of low resistivity W fill causes gate conductance degradation and negatively impacts CMOS performance. A unique Co-fill process combined with scaled barrier thickness is proposed as a new RMG solution. The Co fill significantly improves gate conductance at sub-15nm CD by seam-free gap fill and low resistivity, while achieving target threshold voltage.
Published in: 2017 IEEE International Electron Devices Meeting (IEDM)
Date of Conference: 02-06 December 2017
Date Added to IEEE Xplore: 25 January 2018
ISBN Information:
Electronic ISSN: 2156-017X