1 Introduction
As byte-addressable non-volatile RAM (NVRAM), such as phase-change memory (PCM) and 3D XPoint [2], has great potential to be a mainstream storage device in embedded/mobile systems, a conventional file system should be redesigned for fulfilling characteristics of a nice file system for a byte-addressable NVRAM device. A nice file system for a byte-addressable NVRAM device should shun the possibility of causing write amplification
Some processes perform specific operations that result in rewriting data to storage more than once.
because a write operation consumes more time and energy than a read operation on a byte-addressable NVRAM device. Unfortunately, for the sake of data safety, modern file systems employ a journaling mechanism that writes the same data twice to both the journal and data area of a storage space. As a result, although many write-reduction solutions [3], [4], [5], [6], [7] have been proposed to reduce the size of written data on a byte-addressable NVRAM device in the past decades, these excellent solutions cannot eliminate the write amplification caused by a journaling mechanism. Such observations motivate us to design a write-reduction journaling mechanism that not only shuns the overhead of write amplification but also reduces the size of a write operation by cooperating with write-reduction strategies.