Modeling collinear WATs for parametric yield enhancement in semiconductor manufacturing

Yield enhancement is one of the major objectives for semiconductor manufacturing. In addition to the usual functional yield that needs to achieve a much higher ratio of good dies in a wafer, parametric yield requires other important factors that can improve the quality and capability of the wafer. Owing to the much more complexity for the processes of wafers in today's semiconductor technology, it is difficult to find the root causes that may affect the parameter yield. Based on the selected important factors that may affect the parametric yield, this study aims to provide an efficient analytic framework for modeling the factors with high correlations. A modified PLS approach (mPLS) is applied in this study for model building that can simultaneously handle collinear problems and provide reasonable explanations with physical meaning.