Schematics of the proposed two-transistor spintronic memory cells for several spintronic current-driven and voltage-controlled writing mechanisms: spin diffusion, spin Ha...
Abstract:
This paper proposes a compact nonvolatile three-terminal two-transistor spintronic memory cell with a fast-read operation. It is applicable to a variety of current-driven...Show MoreMetadata
Abstract:
This paper proposes a compact nonvolatile three-terminal two-transistor spintronic memory cell with a fast-read operation. It is applicable to a variety of current-driven and voltage-controlled write mechanisms, such as spin diffusion, spin Hall effect, domain wall motion, and magnetoelectric effect. Compared to the prior three-terminal spintronic memory proposal, the new cell provides 20% improvement in cell density. Compared to the conventional spin torque transfer random access memory, the proposed cell separates the read and write paths, and improves the read energy-delay product by up to 22× considering process variations for transistors and MTJs.
Schematics of the proposed two-transistor spintronic memory cells for several spintronic current-driven and voltage-controlled writing mechanisms: spin diffusion, spin Ha...
Published in: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits ( Volume: 3)