I. Introduction
Semiconductor devices based on silicon carbide (SiC) are typically doped by ion implantation processes followed by thermal annealing steps. This is performed in order to repair the lattice damage caused by the implantation bombardment [1] and to electrically activate the implanted impurities [2]. The post-implantation steps are therefore key to a successful device fabrication and cannot be avoided [3]. However, in order to reach the full potential of electronic devices and at the same time minimize production and operation costs, the accuracy of the process simulations is essential [4].