FIT rate aware EM analysis

We present a novel method for performing Electromigration (EM) verification for VLSI interconnects. It provides an accurate metric for EM reliability for the entire design thus it is not affected by the inherent pessimism existing in the current state-of-art methods used by the industry. In this method, failure rates are computed for each wire interconnect and accumulated in the design. It then becomes possible to determine the overall failure rate margin (the real pass/fail criteria). This paper delves into the relationship between EM current density, technology parameters and the failure rate for each interconnect, which culminates in EM reliability equation. This equation is used to calculate failure rate for each interconnect.