Dynamic voltage and frequency scaling for neuromorphic many-core systems

We present a dynamic voltage and frequency scaling technique within SoCs for per-core power management: the architecture allows for individual, self triggered performance-level scaling of the processing elements (PEs) within less than 100ns. This technique enables each core to adjust its local supply voltage and frequency depending on its current computational load. A test chip has been implemented in 28nm CMOS technology, as prototype of the SpiNNaker2 neuromorphic many core system, containing 4 PEs which are operational within the range of 1.1V down to 0.7V at frequencies from 666MHz down to 100MHz; the effectiveness of the power management technique is demonstrated using a standard benchmark from the application domain. The particular domain area of this application specific processor is real-time neuromorphics. Using a standard benchmark - the synfire chain - we show that the total power consumption can be reduced by 45%, with 85% baseline power reduction and a 30% reduction of energy per neuron and synapse computation, all while maintaining biological real-time operation.

I. Introduction

Digital neuromorphic hardware systems [1], [2] allow efficient implementation of neuromorphic computing for technical applications such as image recognition or robotics control applications. Especially purely digital many core architectures allow for energy efficiency implementations which are scalable to nanometer technologies. For those systems energy efficiency is critical especially for mobile, battery powered application scenarios or large scale brain-size scientific computing with system scaling limitations by power supply and cooling.