A Programmable Inbound Transfer Processor for Active Messages in Embedded Multicore Systems

The "Internet of Things" requires new multicore computing devices with very high energy-efficiency. We propose an improved architecture of these embedded devices with emphasis on the efficiency of data transfers. By performing data re-organization at transport layer within the NoC infrastructure, we avoid the need for intermediate buffers for data distribution and organization. To complement "smart DMA” that structure the traffic at source side, we use a simple programmable processor to reorganize incoming data at target side. By doing this, only useful data is transported on the network, and unpacking at destination restores their structure in the most suitable way for the application, without the need of duplication. We have prototyped an inbound data processor in a MIPS-based multicore architecture. Applied on an image compression application, we save up to 33% memory footprint and divide the processing latency by a factor of 2.