A Carrier-Based Modulation Scheme to Reduce the Third Harmonic Component of Common-Mode Voltage in a Three-Phase Inverter Under High DC Voltage Utilization

High dc voltage utilization is one of the important requirements in a three-phase inverter. Under some carrier-based pulse width modulations (PWMs), the dc voltage utilization can reach the same maximum as that under the space vector modulation. But the third harmonic component of common-mode voltage (CMV) will be increased markedly while using these carrier-based PWMs in inverters. To improve the situation, this paper proposes that a midpoint-fluctuation carrier (MFC) scheme should be used in the three-phase inverter. The MFC is formed by adding a midpoint-fluctuation signal on the standard symmetrical triangular carrier. By analyzing the linear modulation region of the midpoint-fluctuation signals, a minimum fluctuant signal in the linear modulation region is designed in the paper. Compared with the use of other conventional schemes in the three-phase inverter, the use of minimum MFC scheme has higher fundamental amplitude in the output line voltage and smaller magnitude of the third harmonic in the CMV. The feasibility and validity of the MFC are proved by experiment results in a three-phase inverter.

I. Introduction

The input dc voltage utilization is an important figure of merit in three-phase inverters. If the dc voltage is fully utilized in inverters, the restrictions on the power supplies can be relaxed in some degree.