I. Introduction;
Modern day multi-core CPU's want to enable per-core Dynamic Voltage Frequency Scaling (DVFS) for energy efficiency [1]. However, modern hand-held devices look for cost-optimization by merging of the supply rails on the System-on-Chip (SoC). A CPU core powered by a shared rail would have energy wastage if other blocks require higher voltage for high performance. To improve energy efficiency, a fully-integrated digitally-controlled voltage regulator (VR) with autonomous DVFS provides a cost-effective solution as digital circuits can operate better at sub-1V supply voltage and are easy to migrate across technologies [2]–[5].