Automatic optimization of IGBT gate driving waveform using simulated annealing for programmable gate driver IC

Optimizing the gate driving waveform of power devices for energy loss and noise per switching has been attracting attention. This paper proposes a systematic method to automatically optimize the gate waveform by dynamically combining real measurements and software optimization loop based on simulated annealing algorithm. The method is applied to the turn-on and turn-off process of an IGBT double pulse test setup. A gate driving waveform with four time segments is employed for the optimization, which is realized by a help of a programmable gate driver IC. The machine-based optimization finishes within one and half hours and with the resultant optimized waveform, 59% energy loss decrease and 57% voltage overshoot reduction are achieved for the case of the IGBT turn-off compared with a simple single-step gate driving waveform.