TLB maintenance optimization in android emulator for mips platform

Virtual memory concept has been used for a long time in computer systems. Memory Management Unit (MMU) in microprocessor is an essential part of the application of VM concept. As part of modern MMU designs, small but fast cache memory for address mappings called Translation Lookaside Buffer (TLB) is often utilized. TLB is crucial for MMU performance. It can be completely realized in hardware or combine both software and hardware techniques. This paper focuses on software maintained TLB, and describes a novel approach taken for the purpose of optimizing TLB maintenance: using TLB Refill interpreter. The solution in implemented for Android emulator for MIPS platform. Additionally, performance impact analysis is presented for the case of Android operating system emulation.