Study of etch rate against temperature, main hydrogen flow, power and top/vent for epitaxy cleaning recipe

For a standard silicon-epitaxy cleaning recipe, there are eight main steps; namely purge, ramp, bake, etch clean 1, etch clean 2, Trichlorosilane (TCS) purge, TCS coat and cooling steps. Cleaning is critical to clean the process chamber after epitaxy deposition is completed. Historically, acid hydrochloric etch is incorporated with hydrogen to clean and prepare the process chamber to ensure that a good quality of epitaxial growth can be achieved in the next process cycle. However, recipe of cleaning may impact throughput of the process with temperature higher than 1150°C at etch step. By varying the temperature, it may affect the time of ramping to achieve a set temperature as well as the time of stabilization at the set temperature. An attempt has been made to study the impact of etch rate against four important process parameters; namely temperature, main hydrogen flow, power and top/vent setting during cleaning process using a fractional factorial design - a two levels, four factor designs with sixteen unique treatment combinations are employed to determine the significant factors in the production of an optimum etch rate with minimum impact on generating defects (slip and particles) to the epitaxial layer. Etch rate, slip and particles are selected as the response for assessing the most significant factor that may affect quality of etching and cleaning of the chamber. The experimental variables are evaluated using regression model to estimate the relationships and predict the optimized parameters for a cleaning recipe after epitaxy process.