Thermal annealing effects on copper microstructure in Through-Silicon-Vias | IEEE Conference Publication | IEEE Xplore

Thermal annealing effects on copper microstructure in Through-Silicon-Vias


Abstract:

In this paper, we have studied the microstructure evolution of one-year room-temperature-aged Through-Silicon Via (TSV) copper after annealing the TSV samples at 300 °C, ...Show More

Abstract:

In this paper, we have studied the microstructure evolution of one-year room-temperature-aged Through-Silicon Via (TSV) copper after annealing the TSV samples at 300 °C, 400 °C and 500 °C for 180 minutes. Hardness and elastic modulus values are obtained by using nano-indentation technique. The hardness and elastic modulus values decrease as annealing temperature increases. The microstructure of copper (Cu) is examined to obtain grain size and texture, using electron backscatter diffraction (EBSD). Copper grain growth, if any, is studied under different annealing temperatures. There was no observable grain growth for the annealing temperatures studied in this work. Moreover, microstructure variation at different locations within a Cu TSV is also studied.
Date of Conference: 31 May 2016 - 03 June 2016
Date Added to IEEE Xplore: 21 July 2016
ISBN Information:
Print ISSN: 1087-9870
Conference Location: Las Vegas, NV

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