Partial discharges in ceramic substrates - correlation of electric field strength simulations with phase resolved partial discharge measurements

High voltages and the edges of the metallization on ceramic substrates (AMB, DBA, DBC, HTCC, LTCC) lead to high electric field strengths. In the vicinity of the metal edges these high electric field strengths induce partial discharges in the ceramic insulation and in the covering synthetics and thereby represent one key degradation mechanism of power modules. In this work the correlation of the simulated electric field strength with phase resolved partial discharge (PRPD) measurements has been investigated. For the simulation of the electric field strength a new method was used to bypass numerical artifacts. The simulated values showed that it is possible to reduce the electric field strength by an adaption of the metallization structure. There the distance of the upper and the lower metallization to the rim of the ceramic was changed relative to each other. Due to this variation a reduction of the electric field strength by about 30 % can be reached by choosing the optimum distance compared to state of the art modules. In PRPD measurements for ceramic substrates (AlN/Al2O3 by DCB) we examined whether the field reduction leads to higher partial discharge inception voltages (PDIV). The measurements were executed on layouts with different dimensions of the upper and lower metallization relative to each other as well as for 3 different thicknesses of the ceramic insulation (1 mm and 0.63 mm AlN DBC, 0.63 mm and 0.38 mm Al2O3 DBC) layer. An increase from 20 % to 35 % of the PDIV was measured for layouts which were designed according to the findings from the simulation with respect to field strength reduction. Finally, the calculated electric field strength and the measured PDIV were correlated.

I. Introduction

The demands on power modules have increased regarding power electronics for energy transmission systems. Longer lifetimes, rough environments, and also higher temperatures and higher voltages are aimed. Especially the electrical insulation realized by ceramic circuit boards such as DBC (direct copper bonded), AMB (active metal brazed), or DAB (direct aluminum bonded) substrates will have to withstand higher voltages beyond 6.5 kV (i.e., for SiC devices) in the future.