Abstract:
Geometric programming (GP) is popular for use in equation-based optimization of analog circuits thanks to GP-compatible analog performance functions, and its convexity, h...Show MoreMetadata
Abstract:
Geometric programming (GP) is popular for use in equation-based optimization of analog circuits thanks to GP-compatible analog performance functions, and its convexity, hence computational tractability. The main challenge in using GP, and thus a roadblock to wider use and adoption, is the mismatch between what GP can accurately fit, and the behavior of many common device/circuit functions. In this paper, we leverage recent tools from sums-of-squares, moment optimization, and semidefinite optimization (SDP), in order to present a novel and powerful extension to address the monomial inaccuracy: fitting device models as higher-order monomials, defined as the exponential functions of polynomials in the logarithmic variables. By the introduction of high-order monomials, the original GP problems become polynomial geometric programming (PolyGP) problems with non-linear and non-convex objective and constraints. Our PolyGP framework allows significant improvements in model accuracy when symbolic performance functions in terms of device models are present. Via SDP-relaxations inspired by polynomial optimization (POP), we can obtain efficient near-optimal global solutions to the resulting PolyGP. Experimental results through established circuits show that compared to GP, we are able to reduce fitting error of device models to 3.5% from 10.5% on average. Hence, the fitting error of performance functions decrease from 12% of GP and 9% of POP, to 3% accordingly. This translates to the ability of identifying superior solution points and the dramatic decrease of constraint violation in contrast to both GP and POP.
Date of Conference: 14-18 March 2016
Date Added to IEEE Xplore: 28 April 2016
Electronic ISBN:978-3-9815-3707-9
Electronic ISSN: 1558-1101
Conference Location: Dresden, Germany
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA
Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA