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Efficient edge profiling for ILP-processors | IEEE Conference Publication | IEEE Xplore

Efficient edge profiling for ILP-processors


Abstract:

Compilers for VLIW and superscalar machines increasingly use dynamic application behavior or profiling information in optimizations such as instruction scheduling, specul...Show More

Abstract:

Compilers for VLIW and superscalar machines increasingly use dynamic application behavior or profiling information in optimizations such as instruction scheduling, speculative code motion, and code layout. Hence it is extremely useful to develop inexpensive techniques that gather accurate profiling information. This paper presents novel edge profiling techniques that greatly reduce run-time overhead by efficiently exploiting instruction level parallelism between application and instrumentation. Best results are achieved when speculatively executing a software pipelined version of the instrumentation code. For an 8-wide issue machine, measurements for the SPECint95 benchmarks indicate a 10-fold reduction in overhead (from 32.8% to 3.3%), when compared with previous techniques.
Date of Conference: 18-18 October 1998
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-8186-8591-3
Print ISSN: 1089-795X
Conference Location: Paris, France

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